ARCHITECTURES OF HIGH-PERFORMANCE 3D GRAPHICS ACCELERATORS

Speaker :

Kurt Akeley, Silicon Graphics

Sponsor: Silicon Graphics

US Price: $5.00 / Int'l Price: $5.00
Order #: 04-Akeley

Tape Description

Because the computations required to support interactive 3D graphics are both substantial and easily parallelized, special purpose hardware is often used. This lecture describes the calculations required for 3D graphics, and considers various parallel hardware architectures used to implement them. Issues that constrain these systems, such as interprocessor communication, load balancing, and context switching, are contrasted for different architectures.

Tape Length: 53 minutes

Date Recorded:

Usage Suggestions: Upper-division/Graduate-level/Industry & Professional Use

Speaker Biography

Kurt Akeley is Vice President and Chief Engineer of the Advanced Systems Division of Silicon Graphics, and is one of the company's founders. Kurt is responsible for the architectures of the company's high-end graphics accelerators, and for the software library that is used to access these graphics systems.